The present invention relates to circuit arrangements for processing alphanumeric data, i.e. data denoting letters and/or numbers, particularly arrangements of integrated components fabricated according to the MOS technique.
In such an arrangement, the components can be arranged in function blocks which include, for example, an address register, a return address register, a status register, a calculating register, an arithmetic-logic linkage unit, an instruction control, a readout memory, a read/write memory and peripheral channels.
In the computer and data processing art it is becoming increasingly common to employ highly integrated LSI (large scale integration) components so that entire circuits are formed on semiconductor chips, to form complete function modules.
A technique which appears to be particularly suitable for such circuits is the MOS technique because it can be employed to form integrated monolithic structures whose individual transistors and resistors, for example, will have very small surface areas, in spite of their high resistance values. Compared to integrated circuits of the bipolar type, a multiplicity of functions can be accomplished by one module fabricated according to MOS techniques.
In previously known embodiments, entire logic circuits have been constructed of circuit components which are disposed on chips. Thus, for example, read-only memories (ROM), reading and writing random access memories (RAM), forward and backward counters, adders, dynamic and static shift registers, decoders and similar circuit components are presently fabricated on individual chips from which the desired logic circuits can be assembled.
Since these circuit components must be capable of being used in circuits of various configurations to assure a wide variety of applications, they can inevitably not be designed to permit direct interconnection of their terminals. Thus, adapter circuits, or interfaces, are required to enable the chips which contain the various circuit components to be interconnected into complete circuits. In addition to level converters these adapter circuits are essentially composed of logic circuits which permit coaction of the components accommodated on the chips with one another and with various peripheral units. Naturally such adapter circuits must be newly designed and fabricated for each new circuit configuration.